IPR-ED8B10B【PDF 10/11 页】IP 8B10B ENCODER/DECODER RENEW

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8b10b Encoder/Decoder MegaCore Function (ED8B10B) Data Sheet

Table 3. Decoder I/O Signals

Signal Name

rdin

rdforce

valid

dataout[7:0]

kout

kerr

rderr

rdout

rdcascade

Direction

Input

Input

Output

Output

Output

Output

Output

Output

Output

Description

Running disparity input. When rdforce is high, the value on this pin is

used as the current running disparity instead of the internally generated

one.

Force running disparity. When high, the rdin value overrides the

internally generated running disparity.

Valid signal. When high, indicates that a valid decoded word is present

on the dataout output.

Data output. This is the 8-bit decoded data or command.

Command output. When high, indicates that the output is a command

byte, not a data byte.

Special K error. Asserted high when an invalid 10-bit word is received.

Running disparity error. When high indicates the running disparity rules

have been violated.

Running disparity output. The current running disparity (after decoding

the word present on the dataout output).

Cascaded Running disparity. Used when decoders are cascaded.

Resources

Table 4. Resources

Table 4 shows the required speed and estimated gate count of the

ED8B10B in its possible target devices.

Note (1)

Device

APEX 20K Family

EP20K30ETC144-1

Mercury Family

EP1M120F484C7AES

Flex 10K Family

EPF10K30ETC144-1

Mode

Encoder

Decoder

Encoder

Decoder

Encoder

Decoder

LEs/LCs

56

133

56

137

58

129

ESBs/EABs

2

0

1

0

2

0

f MAX (MHz)

173 (2)

150

216 (2)

223

138 (2)

147

Note:

(1)

(2)

10

The numbers for the logic elements/logic cells (LEs/LCs) and embedded system blocks/embedded array blocks

(ESBs/EABs) are approximate as November 2001.

f MAX is for non-cascaded encoder/decoder.

Altera Corporation

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